C5P Development Kit- A Perfect starting point as OpenCL High performance computing development platform

Terasic C5P is a PCIe based FPGA card with high performance and competitive cost. It’s equipped with the largest Cyclone V GX device at 301K LE and it supports PCIe Gen 1 x4. The board comes with 1GB DDR3, 64SDRAM, UART-to-USB interface, and extension headers such as GPIO and Arduino. This makes C5P a re-configurable platform with adequate computing performance and low power consumption.

The package of C5P includes reference designs for all the peripherals onboard. It also has a detailed user manual for developers to follow and start building up a system according to their needs immediately.

The C5P kit is a perfect starting point as OpenCL HPC (High Performance Computing) development platform. It supports Intel FPGA OpenCL BSP for developers to design a system with high level programming language. The computation demanding tasks can be off-loaded from CPU to FPGA, resulting in significant system performance improvement.

FPGA Device

  • Cyclone V 5CGXFC9D6F27C7N Device
    • 301K Programmable Logic Elements
    • 13,917 Kbits embedded memory
    • Eight Fractional PLLs
    • Two Hard Memory Controllers
    • Nine 3.125G Transceivers

Configuration and Debug

  • Quad Serial Configuration device-EPCQ256
  • On-Board USB Blaster II (Mini-B USB connector)

Memory Device

  • 64MB (32M x16) SDRAM
  • 1GB (2 x256M x16) DDR3 SDRAM


  • UART to USB(Mini-B USB connector)
  • PCIe Gen1x 4

Expansion I/O

  • 2 x40 GPIO Header
    • 36 General GPIO Pins
    • Support 8 pairs LVDS TX and 8 pairs LVDS RX
    • Diode protection circuit
    • Configurable I/O standards: 1.5/1.8/2.5/3.3V
  • One Arduino Uno Revision 3 Expansion Hearder
    • Analog ADC
      • SPI Interface
      • 500Ksps Sampling Rate
      • Eight Channels
      • 12-Bit Resolution
      • Analog Input Range:0 ~ 4.096 V
      • Resolution: 12-bit
    • Digital IO
      • Diode protection circuit
  • SMA IN/OUT 3.3V single port

Switches, Buttons, LED, and 7-Segments

  • 5 User Buttons (4 normal buttons, one CPU_RESET_n)
  • 4 User Switches
  • 4 LEDs
  • 2 7-Segments


  • 12V 12V DC input
  • PCIe 12V Input


  • 12V, 5000 Speed Fan

Block Diagram

Continued with this, there are a lot of activities (Workshops/Videos/Application notes) please stay tuned with our YouTube channel as well as blogs to learn more. (Website: https://www.tenettech.com/browse/FPGA)

For any further assistance, please feel free to contact us at info@tenettech.com and we would be more than happy to help.